arm64: mvebu: Init COMPHY from the slave-CP on the A8k
authorStefan Roese <[email protected]>
Tue, 25 Oct 2016 16:12:40 +0000 (18:12 +0200)
committerStefan Roese <[email protected]>
Mon, 5 Dec 2016 12:28:23 +0000 (13:28 +0100)
The Armada8k implements 2 CPs (communication processors) and the 2nd
CP also is equipped with a COMPHY controller. This patch now loops
over all enabled MISC devices (CP110) enabled in the DT to initialize
all CPs.

Signed-off-by: Stefan Roese <[email protected]>
Cc: Nadav Haklai <[email protected]>
Cc: Neta Zur Hershkovits <[email protected]>
Cc: Kostya Porotchkin <[email protected]>
Cc: Omri Itach <[email protected]>
Cc: Igal Liberman <[email protected]>
Cc: Haim Boot <[email protected]>
Cc: Hanna Hawa <[email protected]>
arch/arm/mach-mvebu/arm64-common.c

index 7055a81de32279cb7a18b8ec541e6e6629e11ae1..1fc2ff2f7cf3758a1a88b75ebaf374e7c812820a 100644 (file)
@@ -109,12 +109,20 @@ int arch_early_init_r(void)
 {
        struct udevice *dev;
        int ret;
-
-       /* Call the comphy code via the MISC uclass driver */
-       ret = uclass_get_device(UCLASS_MISC, 0, &dev);
-       if (ret) {
-               debug("COMPHY init failed: %d\n", ret);
-               return -ENODEV;
+       int i;
+
+       /*
+        * Loop over all MISC uclass drivers to call the comphy code
+        * and init all CP110 devices enabled in the DT
+        */
+       i = 0;
+       while (1) {
+               /* Call the comphy code via the MISC uclass driver */
+               ret = uclass_get_device(UCLASS_MISC, i++, &dev);
+
+               /* We're done, once no further CP110 device is found */
+               if (ret)
+                       break;
        }
 
        /* Cause the SATA device to do its early init */